GLV method, Hiasat Multiplier, FPGA, Elliptic
curve processor, Mersenne prime
This paper outlines a FPGA implementation of an elliptic curve processor that utilises the GLV method. The GLV method has been shown to be able to speed up computationally expensive point multiplication operations. We also present an implementation of a Hiasat multiplier which can be used with special moduli to further speed up point multiplications. The Hiasat multiplier takes advantage of fast reduction techniques that can be applied to Mersenne primes. The results are then compared with standard multiplication algorithms.