Conference Publication Details
Mandatory Fields
Keller M.; Kerins T.; Marnane W. P.;
Lecture Notes in Computer Science 3985 International Workshop on Applied Reconfigurable Computing (ARC 2006)
FPGA Implementation of a GF(2^m) Tate PairingArchitecture
2006
March
Published
1
()
Optional Fields
258
269
Delft, The Netherlands
01-MAR-06
03-MAR-06
This paper presents a hardware implementation of a dual mode Tate pairing/elliptic curve processor over fields of characteristic 2. The architecture can be reconfigured for different underlying field sizes and hence can support different security levels. The processor also performs elliptic curve point scalar multiplication. The performance of the architecture implemented on an FPGA is evaluated for various security levels.
10.1007/11802839_44
Grant Details