Conference Publication Details
Mandatory Fields
Ben Ali K.;Gammon P.;Chan C.;Li F.;Pathirana V.;Trajkovic T.;Gity F.;Flandre D.;Kilchytska V.
European Solid-State Device Research Conference
Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applications
2017
October
Validated
1
Scopus: 1 ()
Optional Fields
LDMOS Power devices SEB SEE Si/SiC TID
236
239
2017 IEEE. This work presents a novel Si-on-SiC laterally-diffused (LD) MOSFET structure intended to provide high breakdown voltage of 600 V and be resistant for harsh-environment space applications. Single-event effects (SEE) and total ionizing dose (TID) are investigated for the first time in such device. Initially, the considered Si LDMOS structure on SiC suffers from single-event burnout (SEB) at a drain voltage > 175 V, i.e. much lower than the target. An optimized LDMOS structure with a heavily doped extended P+ buried region is proposed and shown to be SEB resistant at the target drain voltage of 600 V, even for a highly-energetic ion with a linear energy transfer (LET) of 90 MeV/mg/cm2. TID simulations indicate that the main concern is the charge build-up in the thick field oxide (FOX). FOX positive charge density beyond 11011 cm-2 causes the breakdown voltage to drop below 200 V. Different oxide types which feature low 'net' positive charge build-up have to be considered to allow for higher TID hardness. The proposed Si/SiC structure with a p+ region was shown to be resistant to a combined SEE and TID (in case of limited positive charge build-up in FOX) as well as combined SEE and high-temperature (up to 573 K) environments. In comparison to the equivalent Silicon-on-Insulator (SOI) LDMOS, the Si/SiC LDMOS structure with p+ buried region features similar immunity to SEB but allows for higher TID hardness.
10.1109/ESSDERC.2017.8066635
Grant Details